1. Field of the Invention
The present invention relates to a semiconductor fabricating method. More particularly, the present invention relates to a method of fabricating an isolation region.
2. Description of the Related Art
In a conventional fabrication method of forming the shallow trench isolation (STI) structure, a pad silicon nitride layer is formed on active regions to protect the substrate during a chemical-mechanical polishing step. Typically, in order to prevent stress problems, the pad silicon nitride layer cannot be too thick. The preferred thickness of the pad silicon nitride layer is usually about 100 angstroms to 200 angstroms, or about 1500 angstroms. However, because of this certain thin pad silicon nitride layer, it is easy to form scratches in the active regions while the chemical-mechanical polishing is performed. The depth of the typical scratch even can reach 1000 angstroms. The scratches and other possible defects, which usually form on a corner of a STI structure, may reduce the performance of devices.